Freescale Semiconductor /MK80F25615 /SDRAM /AC1

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Interpret as AC1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)IP 0 (00)PS0 (0)IMRS 0CBM0CASL 0 (0)RE 0BA

PS=00, IMRS=0, RE=0, IP=0

Description

Address and Control Register

Fields

IP

Initiate precharge all (pall) command.

0 (0): Take no action.

1 (1): A pall command is sent to the associated SDRAM block. During initialization, this command is executed after all DRAM controller registers are programmed. After IP is set, the next write to an appropriate SDRAM address generates the pall command to the SDRAM block.

PS

Port size.

0 (00): 32-bit port

1 (01): 8-bit port

2 (10): 16-bit port

3 (11): 16-bit port

IMRS

Initiate mode register set (mrs) command.

0 (0): Take no action

1 (1): Initiate mrs command

CBM

Command bit location

CASL

CAS Latency

RE

Refresh enable

0 (0): Do not refresh associated DRAM block

1 (1): Refresh associated DRAM block

BA

Base address register.

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